April 27 2009

November 2009 Electronics Engineering (ECE) Licensure Examination Result

BSECE Board Examinations results for November 2009 will be posted here right after the list of passers become available.

Keep on visiting this page from time to time to know the results right away.

April 27 2009

Passer claims ‘leak’ in ECE board exams

One passer in the recently-released Electronics Engineer (ECE) board exams claimed that a review center leaked to its students some of the questions that appeared in the examination.

Camille Rubio alleged that on March 25 and 26, Excel Review Center presented to its students a flash presentation showing “problem solvings” in two subjects–General Engineering and Applied Sciences.

April 27 2009

Cebuano altar boy No. 9 in engineering exam

AN altar boy who recited “Hail Mary” prayers while taking the Electronics and Communication Engineer (ECE) licensure examination wound up no. 9, the only one from a Cebu university to land in the top ten.

Kevin Joseph Torres, a 23, a native of Tunghaan, Minglanilla town, who lives in Punta Princesa, Cebu City, was ecstatic over the ECE board results released on Thursday.

April 26 2009

Was there a leakage or not?

The Professional Regulation Commission (PRC) has declared that there simply is not enough evidence to indicate that there was any leakage in the board examinations given for the licensing of a new batch of electronics and communications engineers. More than three out of four examinees failed in those exams, says the PRC, suggesting that there was no leakage and that most of the examinees failed simply because they were unprepared.

April 26 2009

Top 10 of the BSECE Board Examination held March 2009

The Professional Regulation Commission (PRC) announces that 598 out of 2,472 passed the Professional Electronics Engineer and Electronics Engineer Licensure Examination given by the Board of Electronics Engineering in the cities of Manila, Baguio and Cebu last March 2009.
March 2009 Top Ten (10) Electronics Engineers:

  1. Mary Grace Ann Surnit Cabañas, De La Salle University – Manila – 92%
  2. Rolex Pedrosa Bargayo, Eastern Visayas State University – Tacloban – 90.30%
  3. Karel Miko Lim De Guia, De La Salle University – Manila – 87.20%
  4. Jhoana Guillen Eduardo Bregonia, De La Salle University – Manila – 86.90%
  5. Kaiser De Asis Fernandez, De La Salle University – Manila – 86.60%
  6. Gian Carlo Jamodiong Estorba, Xavier University – 86.00%
  7. Frank Javier Tua, De La Salle University – Manila – 86.00%
  8. John Elvin Sy Tan, De La Salle University – Manila – 85.90%
  9. Reginne Mirelli Frilles Gabito, Mapua Institute of University – 85.50%
  10. Lorenzo Miguel Adriano Javier, De La Salle University – Manila – 85.40%
  11. Kevin Joseph Del Socorro Torres University of San Jose – Recoletos – 85.40%
  12. Ralph Christian Estabillo Cabello, De La Salle University – Manila – 85.20%

April 25 2009

Welcome to BSECE.COM

Welcome to BSECE.COM, the Philippine Electronics Engineering Online Community.

April 25 2009

PERCDC

BRANCHES

  • Cebu

Rm 254, CDC Building

Colon St. corner Jakosalem St.

Cebu City

Tel. No. : (032) 412 – 1416

April 25 2009

Excel Review Center

Services

A. REVIEW PROGRAM

The review program is comprehensive in the sense that it is composed of three different phases of intensive preparation, namely:

REVIEW COURSE: This is an intensive lecture/discussion type covering basic theories, principles, problems and applications as well as some advanced topics included in the board syllabus. The topics are based from PRC Board Syllabus.

REFRESHER COURSE: This is a comprehensive examination-discussion type of instruction. The reviewees are subjected to a series of examinations patterned from the board exams where actual past board examinations are included. They are given questionnaires and answer sheets and are required to use pencils in shading the correct answer. This is intended to acquaint each one to the actual test. The exam is to be discussed thoroughly right after or on the next meeting for the reviewees to evaluate their performances.

COACHING COURSE: This is the final phase of preparation which is more or less 3 weeks in duration. This is intended to fine-tune reviewees to the much awaited board exam. This consists generally of classroom coaching notes which are to be read with the reviewers around to entertain questions personally. A parallel computer hands-on for this course is conducted at the computer rooms.

April 24 2009

Macro Integrated Review And Training Program (MITRC)

CLAIM

  • MITRC is the only review center directed and managed by all-Electronics and Communications Engineers (and not by businessmen nor of any other profession), who know all the ins and outs of the ECE profession, and whose genuine concern for fellow ECEs remains unchallenged.
  • MITRC is the only review center that has 90% plus passing percentage.  April 2001 board examinations posted the record breaking passing percentage of 97.13%, while the others refuse to announce their passing rate.

CENTERS

  • Suite M1, Mezzanine Floor
    Dona Amparo Building
    Tolentino St. corner Esapna Ave.
    Sampaloc, Manila
    Tel. No.: 7357336 / 7367690

April 24 2009

Wireless Communication

Wireless Communications

  1. Motivation and Introduction
  2. Types of Wireless communication
  3. The modern wireless Communication Systems
  4. The cellular concept -- System Design issues
  5. Cell capacity and reuse
  6. Interference and System capacity
  7. Improving coverage and system capacity
  8. Mobile Radio Propagation
  9. Mobile Radio Propagation Contd
  10. Mobile Radio Propagation Contd
  11. Mobile Radio Propagation Contd
  12. Mobile Radio Propagation Contd
  13. Mobile Radio Propagation Contd
  14. Mobile Radio Propagation II
  15. Mobile Radio Propagation II Contd
  16. Mobile Radio Propagation II Contd
  17. Mobile Radio Propagation II Contd
  18. Mobile Radio Propagation II Contd
  19. Mobile Radio Propagation II Contd
  20. Mobile Radio Propagation II
  21. Modulation Techniques for Mobile Communication
  22. Modulation Techniques for Mobile Communication
  23. Modulation Techniques (Contd.)
  24. Modulation Techniques (Contd.)
  25. Modulation Techniques (Contd.)
  26. Modulation Techniques (Contd.)
  27. Modulation Techniques (Contd.)
  28. Modulation Techniques for Mobile Communications
  29. Equalization and Diversity Techniques
  30. Equalization and Diversity Techniques
  31. Equalization and Diversity Techniques (Contd.)
  32. Equalization and Diversity Techniques (Contd.)
  33. Coding Techniques for Mobile Communications
  34. Coding Techniques for Mobile Communications
  35. Coding Techniques for Mobile (Contd.)
  36. Coding Techniques for Mobile Communications
  37. Wireless Networks
  38. GSM and CDMA
  39. GSM and CDMA (Contd.)

April 24 2009

Transmission Lines And Electromagnetic Waves

April 24 2009

Digital Signal Processing

Digital Signal Processing

  1. Digital Signal Processing Introduction
  2. Digital Signal Processing Introduction Contd
  3. Digital Systems
  4. Characterizatio n Description,Tes ting of Digital Syst
  5. LTI Systems Step & Impulse Responses,Convolution
  6. Inverse Systems,Stabili ty,FIR & IIR
  7. FIR & IIR; Recursive & Non Recursive
  8. Discrete Time Fourier Transform
  9. Discrete Fourier Transform (DFT)
  10. DFT (Contd.)
  11. DFT (Contd.) Introduction to Z Transform
  12. Transform
  13. Transform (Contd.)
  14. Discrete Time Systems in the Frequency Domain
  15. Simple Digital Filters
  16. All Pass Filters,Com.Fil ters
  17. Linear Phase filters,Complem entary Transfer Fn
  18. Compensatary Transfer Functions, (Contd.),
  19. Test for Stability using All Pass Functions
  20. Digital Processing of Continuous Time Signals
  21. Problem Solving Session: FT, DFT,& Z Transforms
  22. Problem Solving Session: FT,DFT, & Z Transforms
  23. Analog Filter Design
  24. Analog Chebyshev LPF Design
  25. Analog Filter Design (Contd.): Transformations
  26. Analog frequency Transformation;
  27. Problem Solving Session on Discrete Time System
  28. Digital Filter Structures
  29. IIR Realizations
  30. All Pass Realizations
  31. Lattice Synthesis (Contd.)
  32. FIR Lattice Synthesis
  33. FIR Lattice (Contd.) and Digital Filter Design
  34. IIR Filter Design
  35. IIR Design by Bilinear Transformation
  36. IIR Design Examples
  37. Digital to Digital Frequency Transformation
  38. FIR Design
  39. FIR Digital Filter Design by Windowing
  40. FIR Design by Windowing & Frequency Sampling

April 24 2009

Digital Communication

Digital Communication

  1. Introduction
  2. Sampling
  3. Quantization , PCM and Delta Modulation
  4. Probability and Random Processes
  5. Probability and Random Processes (Part -- 2)
  6. Channels and their Models
  7. Channels and their Models (Part -2)
  8. Information Theory (Part -- 1)
  9. Information Theory (Part -- 2)
  10. Bandpass Signal Representation ( Part 1 )
  11. Bandpass Signal Representation (Part -- 2)
  12. Digital Modulation Techniques (Part -- 1)
  13. Digital Modulation Techniques (Part -- 2)
  14. Digital Modulation Techniques (Part -- 3)
  15. Digital Modulation Techniques Part -- 4
  16. Digital Modulation Techniques Part -- 5
  17. Digital Modulation Techniques (Part -- 6)
  18. Digital Modulation Techniques (Part -- 7)
  19. Digital Modulation Techniques ( Part -- 8 )
  20. Digital Modulation Techniques (Part -- 9)
  21. Digital Modulation Techniques (Part -- 10)
  22. Probability of Error Calculation
  23. Calculation of Probability of Error
  24. Calculation of Probability of Error
  25. Equalizers
  26. Source Coding (Part -- 1)
  27. Source Coding (Part -- 2)
  28. Source Coding Part -- 3
  29. Source Coding Part 4
  30. Channel Coding
  31. Fundamentals of OFDM
  32. Conclusion

April 24 2009

Digital Circuits and Systems

Digital Circuits And Systems

  1. Introduction to Digital Circuits
  2. Intro duction to Digital Circuits
  3. Combinational Logic Basics
  4. Combinatioal Circuits
  5. Logic Simplification
  6. Karnaugh Maps And Implicants
  7. Logic Minimization Using Karnaugh Maps
  8. Karnaugh Map Minimization Using Maxterms
  9. Code Converters
  10. Parity Generator And Display Decoder
  11. Arithmetic Circuits
  12. Cary Look Ahead Adders
  13. Subtractors
  14. 2′s Complement Subtractor And BCD Adder
  15. ARRAY MULTIPLIER
  16. Introduction to Sequential Circuits
  17. S-R,J-K and D Flip Flops
  18. J-K and T Flip Flops
  19. Triggering Mechanisms of Flip Flops and Counters
  20. UP/DOWN COUNTERS
  21. SHIFT REGISTERS
  22. Application of Shift Registers
  23. STATE MACHINES
  24. DESIGN OF SYNCHRONOUS SEQUENTIAL CIRCUITS
  25. DESIGN USING J-K FLIP FLOP
  26. MEALY AND MOORE CIRCUITS
  27. PATTERN DETECTOR
  28. MSI AND LSI BASED DESIGN
  29. MULTIPLEXER BASED DESIGN
  30. ENCODERS AND DECORDERS
  31. Programmable Logic Devices
  32. Design using Programmable Logic Devices
  33. Design using Programmable Logic Devices
  34. MSI & LSI based Implementation of Sequential…
  35. MSI and LSI Based Implementation of Sequential
  36. Design of Circuits Using MSI Sequential Blocks
  37. System Design Example
  38. System Design Example (Contd..)
  39. System Design Using the Concept of Controllers
  40. System Design Using the Concept of Controllers

April 24 2009

Broadband Networks

Broadband Networks

  1. Introduction to Broadband Networks
  2. Qos in Packet Switching and ATM
  3. ATM Networks
  4. Effective Bandwidth -- I
  5. Effective Bandwidth -- II
  6. Traffic Descriptor in ATM
  7. Calculus for QOS -- I
  8. Calculus For Qos -- II
  9. Packet Scheduling Algorithm Introduction
  10. Fluid Fair Queueing and Weighted Fair Queueing
  11. Virtual Time In Scheduling
  12. Fairness of WFO and SCFO Scheduling Algorithms
  13. Rate Proportional Servers
  14. Latency Rate Servers -- I
  15. Latency Rate Servers -- II And Delay Bounds
  16. QOS In Best Effort Internet
  17. TCP Congestion Control
  18. Analysis of TCP
  19. TCP Throughput
  20. Buffer Management
  21. IP Addressing Scheme
  22. IP Addressing Lookup And Packet Classification
  23. IP Over ATM
  24. Differentiated Services Internet
  25. Voice over IP
  26. RTP
  27. Metro Ethernet Access Networks
  28. Metro Ethernet Access Networks

April 24 2009

Circuit Theory

Circuit Theory

  1. Review of Signals and Systems
  2. Review of Signals and Systems
  3. Network Equations; Initial and Final Conditions
  4. Problem Session1
  5. Step, Impulse and Complete Responses
  6. 2nd Order Circuits:Magnet ically Coupled Circuits
  7. Transformer Transform Domain Analysis
  8. Problem Session 2 : Step,Impulse
  9. Network Theorams and Network Functions
  10. Network Functions(Contd .)
  11. Amplitude and Phase of Network Functions
  12. Problem Session 3 : Network Theorems Transform
  13. Poles, Zeros and Network Response
  14. Single Tuned Circuits
  15. Single Tuned Circuits (Contd.)
  16. Double Tuned Circuits
  17. Double Tuned Circuits (Contd.)
  18. Problem Session 4 : Network Functions, Analysis
  19. Double Tuned Circuits (Contd.)
  20. Concept of Delay and Introduction
  21. Two-port Networks (Contd.)
  22. Problem Session 5
  23. Minor -- 1
  24. The Hybrid & Transmission Parameters of 2 ports
  25. Problem Session 6: Two -- port networks
  26. Two -- port Network parameters
  27. Two-port Interconnection s
  28. Interconnection of Two-port Networks(Contd. )
  29. Problem Session 7 : Two-port Networks(Contd. )
  30. Scattering Matrix
  31. Scattering Parameters of a Two-port
  32. Problem Session 8 : Two- port Parameters
  33. Solutions of Minor -- 2 Problems
  34. Insertion Loss
  35. Example of Insertion Loss and Elements
  36. Elements of Realizability Theory (Contd.)
  37. Positive Real Functions
  38. Testing of Positive Real Functions
  39. Problem Session 9
  40. More on PRF’s and their Synthesis
  41. LC Driving Point Functions
  42. LC Driving Point Synthesis (Contd.)
  43. RC and RL Driving Point Synthesis
  44. Problem Session 10 : LC Driving Point Synthesis
  45. RC & RL One-port Synthesis (Contd.)
  46. Elementary RLC One-port Synthesis
  47. Properties and Synthesis of Transfer Parameters
  48. Resistance Terminated L C Ladder
  49. Resistance Terminated LC Ladder ( Contd.)
  50. Problem session 11: Two-port Synthesis
  51. Network Transmission Criteria

April 24 2009

Basic Electrical Technology

Basic Electrical Technology

  1. Basic Electrical Technology
  2. Passive Components
  3. Sources
  4. Krichoff’s Law
  5. Modelling of Circuit
  6. Modeling of Circuit 2
  7. Analysis Using MatLab
  8. Sinusoidal steady state
  9. Transfer Function and Pole Zero domain
  10. Transfer function & pole zero
  11. Transfer function & pole zero
  12. The Sinusoid
  13. Phasor Analysis
  14. Phasor Analysis part 2
  15. Power Factor
  16. Power ports
  17. Transformer Basics
  18. Transformer Basic part 2
  19. Transformer Basics part 3
  20. The Practical Transformer
  21. Transformer 2
  22. The Practical Transformer Part 3
  23. DC Machine
  24. DC Machines Part 2
  25. DC Generators
  26. DC Generators 2
  27. DC Motors
  28. DC Motor 2
  29. DC Motor 3
  30. Three Phase System
  31. Three Phase System 2
  32. Three Phase System 3
  33. Three Phase System 4
  34. Three Phase Transformer
  35. Three Phase Transformer 2
  36. Induction motor
  37. Induction Motor 2
  38. Induction Motor 3
  39. Induction Motor 4
  40. Synchronous Machine

April 24 2009

Free @bsece.com Emails

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April 24 2009

Analog ICs

Analog ICs

  1. Basic Building Blocks In Analog ICs
  2. Current Mirrors
  3. Translinear Networks
  4. Differential Amplifier
  5. Differential Amplifier Characteristics
  6. Video Amplifier and RF/IF Amplifiers
  7. Cascode Amplifier
  8. IC Negative Feedback Wide Band Amplifiers
  9. IC Negative Feedback Amplifiers
  10. Voltage Sources And References
  11. IC Voltage Regulator
  12. Characteristics and Parameters Of Voltage
  13. Protection Circuitry For Voltage Regulator
  14. Switched Mode Regulator And Operational
  15. IC Operational Voltage Amplifier
  16. General Purpose Operational Amplifier-747
  17. Transconductanc e Operational Amplifier
  18. Audio Power Amplifier and Norton’s Amplifier
  19. Analog Multipliers
  20. Analog Multipliers
  21. Voltage Controlled Oscillator
  22. Voltage Controlled Oscillator
  23. Self Tuned Filter
  24. Phase Locked Loop
  25. Phase Locked Loop
  26. Phase Locked Loop
  27. Phase Locked Loop
  28. Current Mode ICs

April 24 2009

Basic Electronics

Basic Electronics

  1. Introduction to Basic Electronics
  2. Electronic Devices 1
  3. Electronics Devices
  4. Some Useful Laws in Basic Electronics
  5. Some Useful Theorems in Basic Electronics
  6. Semi Conductor Diodes
  7. Application of Diodes
  8. Wave Shaping using Diodes
  9. Zener Diode Characteristics
  10. Transistors
  11. Transistor Biasing
  12. Transistor Biasing
  13. Basic Characteristic of an Amplifer
  14. Hybrid Equivalent Circuit, H-Parameters
  15. Circuit Analysis using H-Parameters
  16. Frequency Response of Amplifiers
  17. Frequency Analysis
  18. Power Amplifiers
  19. Differential Amplifiers CKT
  20. Integrated Chip
  21. Typical Characteristic of Operation Amplifier
  22. Four Types of Feed Back
  23. Four Types of Feed Back
  24. Mathematical Operations
  25. Mathematical Operations
  26. Mathematical Operations
  27. Characteristics of Operation Amplifier
  28. Characteristics of Operation Amplifier
  29. Characteristics of Operation Amplifier
  30. Inverter/Non-In verter Circuits
  31. Applications of Op Amps
  32. Non-Linear Op Amp circuits
  33. Applications of Op Amps
  34. Active Diode Circuits
  35. Oscillatiors
  36. Logarthmic and Anti-Logarthmic Amplifer
  37. Filters
  38. Unit Junction Transistor
  39. Silicion Controlled Rectifier
  40. Field Effect Transistor

April 24 2009

Engineering Reviewers of Asia

ERA is the longest running ECE review school in the country. They also have branches in Cebu and Baguio. They claim to have produced the highest number of Board topnotchers with 257 as of early 2001. They claim to also have comprehensive board exams and lectures that were designed in the manner that the actual board examinations are being conducted. And they boast of their Mathematics review director, Engr. Perfecto Padilla, with 100% board ratings in Mathematics. Like MITRC, ERA also offers cash incentive to topnotchers.

  • Address

Rm. 409 4/f Dona Amparo Bldg., Tolentino St. cor Espana Blvd.,

Sampaloc, Manila

  • Contact Number

735-7257

0918-838-1329

April 24 2009

March 2009 Electronics Engineering (ECE) Licensure Examination Result

Roll of Successful Examinees in the ELECTRONICS ENGINEER LICENSURE EXAMINATION Held in MARCH 2009, Released on APRIL 1, 2009

April 24 2009

Consolidated Engineering Review and Training Institute Inc.

For more than 15 years in the business, Consolidated Engineering Review & Training Institute (CERTII) developed a review program that has been unparalleled in the engineering review industry. CERTII offers excellent review courses for ECE (Electronics and Communications Engineering) and EE (Electrical Engineering) graduates. Through the years, CERTII has not only produced topnotchers, but also has assisted the top performing schools in preparing their graduates for the board examinations.

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